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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/DasS95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Saibal_Das>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sanjeev_Saxena>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICVD.1995.512070>
foaf:homepage <https://doi.org/10.1109/ICVD.1995.512070>
dc:identifier DBLP conf/vlsid/DasS95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICVD.1995.512070 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Parallel algorithms for single row routing in narrow streets. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Saibal_Das>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sanjeev_Saxena>
swrc:pages 13-18 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsid/DasS95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsid/DasS95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsid/vlsid1995.html#DasS95>
rdfs:seeAlso <https://doi.org/10.1109/ICVD.1995.512070>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsid>
dc:subject parallel algorithms; network routing; integrated circuit layout; circuit layout CAD; VLSI; parallel algorithms; single row routing; narrow streets; optimal layout; CREW PRAM; tree machine; VLSI layout; IC design (xsd:string)
dc:title Parallel algorithms for single row routing in narrow streets. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document