Geometric bipartitioning problem and its applications to VLSI.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/DasguptaSNB96
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Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/DasguptaSNB96
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Anup_K._Sen
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Bhargab_B._Bhattacharya
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Parthasarathi_Dasgupta
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Subhas_C._Nandy
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FICVD.1996.489642
>
foaf:
homepage
<
https://doi.org/10.1109/ICVD.1996.489642
>
dc:
identifier
DBLP conf/vlsid/DasguptaSNB96
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FICVD.1996.489642
(xsd:string)
dcterms:
issued
1996
(xsd:gYear)
rdfs:
label
Geometric bipartitioning problem and its applications to VLSI.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Anup_K._Sen
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Bhargab_B._Bhattacharya
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Parthasarathi_Dasgupta
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Subhas_C._Nandy
>
swrc:
pages
400-405
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/1996
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/vlsid/DasguptaSNB96/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/vlsid/DasguptaSNB96
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/vlsid/vlsid1996.html#DasguptaSNB96
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ICVD.1996.489642
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/vlsid
>
dc:
subject
circuit layout CAD; VLSI; network routing; graph theory; computational complexity; search problems; geometric bipartitioning problem; VLSI; layout design; floorplan; rectilinear modules; staircase; monotone increasing; geometry; classical graph bisection problem; weighted permutation graph; integer edge weights; designated nodes; absolute value; edge weights; NP-complete; heuristic algorithm; branch-and-bound; hierarchical decomposition; routing
(xsd:string)
dc:
title
Geometric bipartitioning problem and its applications to VLSI.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document