40nm Ultra-low Leakage SRAM with Embedded Sub-threshold Analog Closed Loop System for Efficient Source Biasing of the Memory Array in Retention Mode. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

Property	Value
dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/DhoriKLUCCPPN22>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Christophe_Lecocq>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Daniel_Noblet>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Florian_Cacho>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Kedar_Janardan_Dhori>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Maryline_Parra>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Olivier_Callen>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Pascal_Urard>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Prashant_Pandey>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Promod_Kumar>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FVLSID2022.2022.00050>
foaf:homepage	<https://doi.org/10.1109/VLSID2022.2022.00050>
dc:identifier	DBLP conf/vlsid/DhoriKLUCCPPN22 (xsd:string)
dc:identifier	DOI doi.org%2F10.1109%2FVLSID2022.2022.00050 (xsd:string)
dcterms:issued	2022 (xsd:gYear)
rdfs:label	40nm Ultra-low Leakage SRAM with Embedded Sub-threshold Analog Closed Loop System for Efficient Source Biasing of the Memory Array in Retention Mode. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Christophe_Lecocq>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Daniel_Noblet>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Florian_Cacho>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Kedar_Janardan_Dhori>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Maryline_Parra>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Olivier_Callen>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Pascal_Urard>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Prashant_Pandey>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Promod_Kumar>
swrc:pages	216-221 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/2022>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/conf/vlsid/DhoriKLUCCPPN22/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/conf/vlsid/DhoriKLUCCPPN22>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/vlsid/vlsid2022.html#DhoriKLUCCPPN22>
rdfs:seeAlso	<https://doi.org/10.1109/VLSID2022.2022.00050>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/vlsid>
dc:title	40nm Ultra-low Leakage SRAM with Embedded Sub-threshold Analog Closed Loop System for Efficient Source Biasing of the Memory Array in Retention Mode. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:InProceedings
rdf:type	foaf:Document