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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/DuttaB09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ramen_Dutta>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/T._K._Bhattacharyya>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVLSI.Design.2009.88>
foaf:homepage <https://doi.org/10.1109/VLSI.Design.2009.88>
dc:identifier DBLP conf/vlsid/DuttaB09 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVLSI.Design.2009.88 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label A Low Power Architecture to Extend the Tuning Range of a Quadrature Clock. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ramen_Dutta>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/T._K._Bhattacharyya>
swrc:pages 439-444 (xsd:string)
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owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsid/DuttaB09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsid/vlsid2009.html#DuttaB09>
rdfs:seeAlso <https://doi.org/10.1109/VLSI.Design.2009.88>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsid>
dc:title A Low Power Architecture to Extend the Tuning Range of a Quadrature Clock. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document