[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/HeraguPA96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Janak_H._Patel>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Keerthi_Heragu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vishwani_D._Agrawal>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICVD.1996.489646>
foaf:homepage <https://doi.org/10.1109/ICVD.1996.489646>
dc:identifier DBLP conf/vlsid/HeraguPA96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICVD.1996.489646 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label Improving accuracy in path delay fault coverage estimation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Janak_H._Patel>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Keerthi_Heragu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vishwani_D._Agrawal>
swrc:pages 422-425 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsid/HeraguPA96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsid/HeraguPA96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsid/vlsid1996.html#HeraguPA96>
rdfs:seeAlso <https://doi.org/10.1109/ICVD.1996.489646>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsid>
dc:subject combinational circuits; fault diagnosis; logic testing; delays; circuit analysis computing; logic CAD; graph theory; path delay fault; fault coverage estimation; simulated vector pair; approximate methods; exact fault simulation; CPU time; fixed-length path-segments; fan-in branches; fan-out branches; flagged path-segments; segment lengths; combinational paths (xsd:string)
dc:title Improving accuracy in path delay fault coverage estimation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document