Evaluation of Various Routing Architectures for Multi-FPGA Boards.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/JainKK00
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/JainKK00
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Anshul_Kumar
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shashi_Kumar
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Sushil_Chandra_Jain
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FICVD.2000.812619
>
foaf:
homepage
<
https://doi.org/10.1109/ICVD.2000.812619
>
dc:
identifier
DBLP conf/vlsid/JainKK00
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FICVD.2000.812619
(xsd:string)
dcterms:
issued
2000
(xsd:gYear)
rdfs:
label
Evaluation of Various Routing Architectures for Multi-FPGA Boards.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Anshul_Kumar
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shashi_Kumar
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Sushil_Chandra_Jain
>
swrc:
pages
262-267
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/2000
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/vlsid/JainKK00/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/vlsid/JainKK00
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/vlsid/vlsid2000.html#JainKK00
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ICVD.2000.812619
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/vlsid
>
dc:
subject
FPGA, Rapid Prototyping, Reconfigurable Computing
(xsd:string)
dc:
title
Evaluation of Various Routing Architectures for Multi-FPGA Boards.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document