A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/KhawsheVRGKPVRPTDA09
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Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/KhawsheVRGKPVRPTDA09
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Abhijit_Abhyankar
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kapil_Vyas
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kashinath_Prabhu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kunal_Desai
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Leneesh_Raghavan
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/M._Thrivikraman
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Prateek_Goyal
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Pravin_Kumar_Venkatesan
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Rajkumar_Palwai
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Renu_Rangnekar
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Vijay_Khawshe
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Vijay_Krishna
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FVLSI.Design.2009.65
>
foaf:
homepage
<
https://doi.org/10.1109/VLSI.Design.2009.65
>
dc:
identifier
DBLP conf/vlsid/KhawsheVRGKPVRPTDA09
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FVLSI.Design.2009.65
(xsd:string)
dcterms:
issued
2009
(xsd:gYear)
rdfs:
label
A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Abhijit_Abhyankar
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kapil_Vyas
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kashinath_Prabhu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kunal_Desai
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Leneesh_Raghavan
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/M._Thrivikraman
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Prateek_Goyal
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Pravin_Kumar_Venkatesan
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Rajkumar_Palwai
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Renu_Rangnekar
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Vijay_Khawshe
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Vijay_Krishna
>
swrc:
pages
373-378
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/2009
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/vlsid/KhawsheVRGKPVRPTDA09/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/vlsid/KhawsheVRGKPVRPTDA09
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/vlsid/vlsid2009.html#KhawsheVRGKPVRPTDA09
>
rdfs:
seeAlso
<
https://doi.org/10.1109/VLSI.Design.2009.65
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/vlsid
>
dc:
title
A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document