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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/KrishnaswamyHSRPB97>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dilip_Krishnaswamy>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Elizabeth_M._Rudnick>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Janak_H._Patel>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Michael_S._Hsiao>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Prithviraj_Banerjee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vikram_Saxena>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICVD.1997.568180>
foaf:homepage <https://doi.org/10.1109/ICVD.1997.568180>
dc:identifier DBLP conf/vlsid/KrishnaswamyHSRPB97 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICVD.1997.568180 (xsd:string)
dcterms:issued 1997 (xsd:gYear)
rdfs:label Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dilip_Krishnaswamy>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Elizabeth_M._Rudnick>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Janak_H._Patel>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Michael_S._Hsiao>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Prithviraj_Banerjee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vikram_Saxena>
swrc:pages 475-481 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/1997>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsid/KrishnaswamyHSRPB97/dblp>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsid/vlsid1997.html#KrishnaswamyHSRPB97>
rdfs:seeAlso <https://doi.org/10.1109/ICVD.1997.568180>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsid>
dc:subject logic testing, parallel genetic algorithms, simulation-based test generation, sequential circuit test generation, NP-complete problems, VLSI circuits, distributed memory MIMD machines, shared memory MIMD machines, fault coverage, parallel search strategies (xsd:string)
dc:title Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document