Design of Multi-GHz Asynchronous Pipelined Circuits in MOS Current-Mode Logic.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/KwanS05
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/KwanS05
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Maitham_Shams
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Tin_Wai_Kwan
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FICVD.2005.75
>
foaf:
homepage
<
https://doi.org/10.1109/ICVD.2005.75
>
dc:
identifier
DBLP conf/vlsid/KwanS05
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FICVD.2005.75
(xsd:string)
dcterms:
issued
2005
(xsd:gYear)
rdfs:
label
Design of Multi-GHz Asynchronous Pipelined Circuits in MOS Current-Mode Logic.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Maitham_Shams
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Tin_Wai_Kwan
>
swrc:
pages
301-306
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/2005
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/vlsid/KwanS05/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/vlsid/KwanS05
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/vlsid/vlsid2005.html#KwanS05
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ICVD.2005.75
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/vlsid
>
dc:
title
Design of Multi-GHz Asynchronous Pipelined Circuits in MOS Current-Mode Logic.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document