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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/MajhiJPA96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ananta_K._Majhi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/James_Jacob>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lalit_M._Patnaik>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vishwani_D._Agrawal>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICVD.1996.489645>
foaf:homepage <https://doi.org/10.1109/ICVD.1996.489645>
dc:identifier DBLP conf/vlsid/MajhiJPA96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICVD.1996.489645 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label On test coverage of path delay faults. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ananta_K._Majhi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/James_Jacob>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lalit_M._Patnaik>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vishwani_D._Agrawal>
swrc:pages 418-421 (xsd:string)
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owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsid/MajhiJPA96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsid/MajhiJPA96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsid/vlsid1996.html#MajhiJPA96>
rdfs:seeAlso <https://doi.org/10.1109/ICVD.1996.489645>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsid>
dc:subject delays; combinational circuits; fault diagnosis; logic testing; redundancy; circuit analysis computing; computational complexity; path delay faults; test coverage; coverage metric; two-pass test generation method; combinational logic circuits; falling transition; line delay test; longest sensitizable path; longest paths; fault simulation; decreasing length; redundant stuck-at fault; benchmark circuits (xsd:string)
dc:title On test coverage of path delay faults. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document