Path Delay Testing: Variable-Clock Versus Rated-Clock. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Subhashis_Majumder>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Vishwani_D._Agrawal>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FICVD.1998.646651>
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dc:identifier	DBLP conf/vlsid/MajumderBA98 (xsd:string)
dc:identifier	DOI doi.org%2F10.1109%2FICVD.1998.646651 (xsd:string)
dcterms:issued	1998 (xsd:gYear)
rdfs:label	Path Delay Testing: Variable-Clock Versus Rated-Clock. (xsd:string)
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foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Subhashis_Majumder>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Vishwani_D._Agrawal>
swrc:pages	470-475 (xsd:string)
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rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/vlsid/vlsid1998.html#MajumderBA98>
rdfs:seeAlso	<https://doi.org/10.1109/ICVD.1998.646651>
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dc:subject	Delay testing, path delay faults, rated-clock testing, sequential circuit test, slow-clock testing. (xsd:string)
dc:title	Path Delay Testing: Variable-Clock Versus Rated-Clock. (xsd:string)
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