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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/MalD04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anindya_Sundar_Dhar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ashis_Kumar_Mal>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICVD.2004.1260999>
foaf:homepage <https://doi.org/10.1109/ICVD.2004.1260999>
dc:identifier DBLP conf/vlsid/MalD04 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICVD.2004.1260999 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Analog VLSI Architecture for Discrete Cosine Transform using Dynamic Switched Capacitors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anindya_Sundar_Dhar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ashis_Kumar_Mal>
swrc:pages 666-669 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsid/MalD04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsid/MalD04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsid/vlsid2004.html#MalD04>
rdfs:seeAlso <https://doi.org/10.1109/ICVD.2004.1260999>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsid>
dc:title Analog VLSI Architecture for Discrete Cosine Transform using Dynamic Switched Capacitors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document