[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/MehendaleSV96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/G._Venkatesh_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mahesh_Mehendale>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sunil_D._Sherlekar>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICVD.1996.489637>
foaf:homepage <https://doi.org/10.1109/ICVD.1996.489637>
dc:identifier DBLP conf/vlsid/MehendaleSV96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICVD.1996.489637 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label Low power realization of FIR filters using multirate architectures. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/G._Venkatesh_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mahesh_Mehendale>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sunil_D._Sherlekar>
swrc:pages 370-375 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsid/MehendaleSV96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsid/MehendaleSV96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsid/vlsid1996.html#MehendaleSV96>
rdfs:seeAlso <https://doi.org/10.1109/ICVD.1996.489637>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsid>
dc:subject FIR filters; digital filters; computational complexity; application specific integrated circuits; digital signal processing chips; low power realization; FIR filters; multirate architectures; computationally efficient implementations; computational complexity; power dissipation reduction; dedicated ASIC implementation; TMS320C2x/C5x programmable DSP; power analysis (xsd:string)
dc:title Low power realization of FIR filters using multirate architectures. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document