A P4VT (Power Performance Process Parasitic Voltage Temperature) Aware Dual-VTh Nano-CMOS VCO.
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/MohantyGK10
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Dhruva_Ghai
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Elias_Kougianos
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Saraju_P._Mohanty
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FVLSI.Design.2010.15
>
foaf:
homepage
<
https://doi.org/10.1109/VLSI.Design.2010.15
>
dc:
identifier
DBLP conf/vlsid/MohantyGK10
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FVLSI.Design.2010.15
(xsd:string)
dcterms:
issued
2010
(xsd:gYear)
rdfs:
label
A P4VT (Power Performance Process Parasitic Voltage Temperature) Aware Dual-VTh Nano-CMOS VCO.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Dhruva_Ghai
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Elias_Kougianos
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Saraju_P._Mohanty
>
swrc:
pages
99-104
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/2010
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/vlsid/MohantyGK10/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/vlsid/MohantyGK10
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/vlsid/vlsid2010.html#MohantyGK10
>
rdfs:
seeAlso
<
https://doi.org/10.1109/VLSI.Design.2010.15
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/vlsid
>
dc:
title
A P4VT (Power Performance Process Parasitic Voltage Temperature) Aware Dual-VTh Nano-CMOS VCO.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document