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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/PannerselvamSBJ93>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/A._Sarkar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/G._Pannerselvam>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Graham_A._Jullien>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Subir_Bandyopadhyay>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICVD.1993.669682>
foaf:homepage <https://doi.org/10.1109/ICVD.1993.669682>
dc:identifier DBLP conf/vlsid/PannerselvamSBJ93 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICVD.1993.669682 (xsd:string)
dcterms:issued 1993 (xsd:gYear)
rdfs:label Area Efficient VLSI Design with Cells of Controllable Complexity. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/A._Sarkar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/G._Pannerselvam>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Graham_A._Jullien>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Subir_Bandyopadhyay>
swrc:pages 218-221 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/1993>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsid/PannerselvamSBJ93/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsid/PannerselvamSBJ93>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsid/vlsid1993.html#PannerselvamSBJ93>
rdfs:seeAlso <https://doi.org/10.1109/ICVD.1993.669682>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsid>
dc:title Area Efficient VLSI Design with Cells of Controllable Complexity. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document