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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/SarkarBM96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anupam_Basu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Arun_K._Majumdar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Santonu_Sarkar>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FICVD.1996.489473>
foaf:homepage <https://doi.org/10.1109/ICVD.1996.489473>
dc:identifier DBLP conf/vlsid/SarkarBM96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FICVD.1996.489473 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label Representation and Synthesis of Interface of a Circuit for its Reuse. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anupam_Basu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Arun_K._Majumdar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Santonu_Sarkar>
swrc:pages 140-145 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsid/SarkarBM96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsid/SarkarBM96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsid/vlsid1996.html#SarkarBM96>
rdfs:seeAlso <https://doi.org/10.1109/ICVD.1996.489473>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsid>
dc:subject reconfigurable architectures; random-access storage; memory architecture; programmable logic devices; integrated circuit interconnections; VaWiRAM; variable width random access memory; flexible memory systems; reconfigurability; programmable logic; programmable interconnect; configuration pins; pass gates (xsd:string)
dc:title Representation and Synthesis of Interface of a Circuit for its Reuse. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document