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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsid/SinghAAPR02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ansuman_Rout>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nutan_Aarawal>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Penaka_Phani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shamsi_Azmi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shobha_Singh>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FASPDAC.2002.994961>
foaf:homepage <https://doi.org/10.1109/ASPDAC.2002.994961>
dc:identifier DBLP conf/vlsid/SinghAAPR02 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FASPDAC.2002.994961 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label Architecture and Design of a High Performance SRAM for SOC Design. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ansuman_Rout>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nutan_Aarawal>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Penaka_Phani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shamsi_Azmi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shobha_Singh>
swrc:pages 447-451 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/2002>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsid/SinghAAPR02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsid/SinghAAPR02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsid/vlsid2002.html#SinghAAPR02>
rdfs:seeAlso <https://doi.org/10.1109/ASPDAC.2002.994961>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsid>
dc:title Architecture and Design of a High Performance SRAM for SOC Design. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document