Parallel test generation with low communication overhead.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vlsid/VenkatramanSA95
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1995
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Parallel test generation with low communication overhead.
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combinational circuits; logic testing; Boolean functions; software performance evaluation; processor scheduling; parallel algorithms; shared memory systems; parallel test generation; low communication overhead; combinational logic; boolean satisfiability; dynamic search-space allocation strategy; greedy heuristic; analytical model; Sequent multiprocessor; shared memory multiprocessor
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Parallel test generation with low communication overhead.
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