A 3-nm 27.6-Mbit/mm2 Self-timed SRAM Enabling 0.48 - 1.2 V Wide Operating Range with Far-end Pre-charge and Weak-Bit Tracking.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vlsit/AoyagiYTIONNWHC23
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/vlsit/AoyagiYTIONNWHC23
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hong-Chen_Cheng
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hung-Jen_Liao
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Isabel_Wang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Koji_Nii
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Makoto_Yabuuchi
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Takaaki_Nakazato
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Tomotaka_Tanaka
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Tsung-Yung_Jonathan_Chang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yoshiaki_Osada
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yu-Hao_Hsu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yuichiro_Ishii
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yumito_Aoyagi
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.23919%2FVLSITechnologyandCir57934.2023.10185429
>
foaf:
homepage
<
https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185429
>
dc:
identifier
DBLP conf/vlsit/AoyagiYTIONNWHC23
(xsd:string)
dc:
identifier
DOI doi.org%2F10.23919%2FVLSITechnologyandCir57934.2023.10185429
(xsd:string)
dcterms:
issued
2023
(xsd:gYear)
rdfs:
label
A 3-nm 27.6-Mbit/mm2 Self-timed SRAM Enabling 0.48 - 1.2 V Wide Operating Range with Far-end Pre-charge and Weak-Bit Tracking.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hong-Chen_Cheng
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hung-Jen_Liao
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Isabel_Wang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Koji_Nii
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Makoto_Yabuuchi
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Takaaki_Nakazato
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Tomotaka_Tanaka
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Tsung-Yung_Jonathan_Chang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yoshiaki_Osada
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yu-Hao_Hsu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yuichiro_Ishii
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yumito_Aoyagi
>
swrc:
pages
1-2
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/vlsit/2023
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/vlsit/AoyagiYTIONNWHC23/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/vlsit/AoyagiYTIONNWHC23
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/vlsit/vlsit2023.html#AoyagiYTIONNWHC23
>
rdfs:
seeAlso
<
https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185429
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/vlsit
>
dc:
title
A 3-nm 27.6-Mbit/mm2 Self-timed SRAM Enabling 0.48 - 1.2 V Wide Operating Range with Far-end Pre-charge and Weak-Bit Tracking.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document
![[RDF data]](https://dblp.l3s.de/d2r/snorql/rdf_flyer.24.gif)