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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsit/HafezAAABBBBCCC23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/A._Barik>
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dc:creator <https://dblp.l3s.de/d2r/resource/authors/S.-H._Lee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/S.-j._Wu>
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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Walid_M._Hafez>
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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Y._Luo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Y._Maymon>
foaf:homepage <http://dx.doi.org/doi.org%2F10.23919%2FVLSITechnologyandCir57934.2023.10185208>
foaf:homepage <https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185208>
dc:identifier DBLP conf/vlsit/HafezAAABBBBCCC23 (xsd:string)
dc:identifier DOI doi.org%2F10.23919%2FVLSITechnologyandCir57934.2023.10185208 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label Intel PowerVia Technology: Backside Power Delivery for High Density and High-Performance Computing. (xsd:string)
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/B._Marinkovic>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bernhard_Sell>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/C.-l._Lo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/C._Firby>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/C._Tsai>
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/E._Haralson>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/F._Shah>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/G._Lanni>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/G._Malyavanatham>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/H.-h._Lai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hannes_Greve>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J._Neirynck>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J._Stoeger>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jeffery_Hicks>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/K._Fischer>
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/K._Shang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/L._Pantisano>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Leif_Paulson>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/M._Asoro>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/M._Aykol>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/M._Bapna>
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swrc:pages 1-2 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185208>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsit>
dc:title Intel PowerVia Technology: Backside Power Delivery for High Density and High-Performance Computing. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document