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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsit/LiPZYWLCLTGWFYO22>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Atsushi_Shirane>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dongwon_You>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jian_Pang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kazuaki_Kunihiro>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kenichi_Okada>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Minzhe_Tang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Naoki_Oshima>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Peng_Luo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Qiaoyu_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shinichi_Hori>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Weichu_Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xi_Fu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yi_Zhang_0092>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yijing_Liao>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yudai_Yamazaki>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yun_Wang_0008>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zheng_Li_0021>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhengyan_Guo>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVLSITechnologyandCir46769.2022.9830274>
foaf:homepage <https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830274>
dc:identifier DBLP conf/vlsit/LiPZYWLCLTGWFYO22 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVLSITechnologyandCir46769.2022.9830274 (xsd:string)
dcterms:issued 2022 (xsd:gYear)
rdfs:label A 39-GHz CMOS Bi-Directional Doherty Phased-Array Beamformer Using Shared-LUT DPD with Inter-Element Mismatch Compensation Technique for 5G Base-Station. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Atsushi_Shirane>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dongwon_You>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jian_Pang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kazuaki_Kunihiro>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kenichi_Okada>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Minzhe_Tang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Naoki_Oshima>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Peng_Luo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Qiaoyu_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shinichi_Hori>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Weichu_Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xi_Fu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yi_Zhang_0092>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yijing_Liao>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yudai_Yamazaki>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yun_Wang_0008>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zheng_Li_0021>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhengyan_Guo>
swrc:pages 98-99 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsit/2022>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsit/LiPZYWLCLTGWFYO22/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsit/LiPZYWLCLTGWFYO22>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#LiPZYWLCLTGWFYO22>
rdfs:seeAlso <https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830274>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsit>
dc:title A 39-GHz CMOS Bi-Directional Doherty Phased-Array Beamformer Using Shared-LUT DPD with Inter-Element Mismatch Compensation Technique for 5G Base-Station. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document