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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsit/OsadaNNLWLFLC23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hidehiro_Fujiwara>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hung-Jen_Liao>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jhon-Jhy_Liaw>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Koji_Nii>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Quincy_Li>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shien-Yang_Michael_Wu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takaaki_Nakazato>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tsung-Yung_Jonathan_Chang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yoshiaki_Osada>
foaf:homepage <http://dx.doi.org/doi.org%2F10.23919%2FVLSITechnologyandCir57934.2023.10185289>
foaf:homepage <https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185289>
dc:identifier DBLP conf/vlsit/OsadaNNLWLFLC23 (xsd:string)
dc:identifier DOI doi.org%2F10.23919%2FVLSITechnologyandCir57934.2023.10185289 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label 3.7-GHz Multi-Bank High-Current Single-Port Cache SRAM with 0.5V-1.4V Wide Voltage Range Operation in 3nm FinFET for HPC Applications. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hidehiro_Fujiwara>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hung-Jen_Liao>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jhon-Jhy_Liaw>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Koji_Nii>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Quincy_Li>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shien-Yang_Michael_Wu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takaaki_Nakazato>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tsung-Yung_Jonathan_Chang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yoshiaki_Osada>
swrc:pages 1-2 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsit/2023>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsit/OsadaNNLWLFLC23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsit/OsadaNNLWLFLC23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsit/vlsit2023.html#OsadaNNLWLFLC23>
rdfs:seeAlso <https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185289>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsit>
dc:title 3.7-GHz Multi-Bank High-Current Single-Port Cache SRAM with 0.5V-1.4V Wide Voltage Range Operation in 3nm FinFET for HPC Applications. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document