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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsit/ShimoiMSOTKITMI22>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hidenori_Mitani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ken_Matsubara>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Koichi_Takeda>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masayuki_Izuna>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takahiro_Shimoi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takashi_Ito>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takashi_Kono>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tomoya_Ogawa>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tomoya_Saito>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yasuhiko_Taito>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yoshinobu_Kaneda>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVLSITechnologyandCir46769.2022.9830273>
foaf:homepage <https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830273>
dc:identifier DBLP conf/vlsit/ShimoiMSOTKITMI22 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVLSITechnologyandCir46769.2022.9830273 (xsd:string)
dcterms:issued 2022 (xsd:gYear)
rdfs:label A 22nm 32Mb Embedded STT-MRAM Macro Achieving 5.9ns Random Read Access and 5.8MB/s Write Throughput at up to Tj of 150 ¬įC. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hidenori_Mitani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ken_Matsubara>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Koichi_Takeda>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masayuki_Izuna>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takahiro_Shimoi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takashi_Ito>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takashi_Kono>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tomoya_Ogawa>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tomoya_Saito>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yasuhiko_Taito>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yoshinobu_Kaneda>
swrc:pages 134-135 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsit/2022>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsit/ShimoiMSOTKITMI22/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsit/ShimoiMSOTKITMI22>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#ShimoiMSOTKITMI22>
rdfs:seeAlso <https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830273>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsit>
dc:title A 22nm 32Mb Embedded STT-MRAM Macro Achieving 5.9ns Random Read Access and 5.8MB/s Write Throughput at up to Tj of 150 ¬įC. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document