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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsit/SuzukiHBUU23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kazuhiro_Bessho>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Keizo_Hiraga>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kenta_Suzuki>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kimiyoshi_Usami>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Taku_Umebayashi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.23919%2FVLSITechnologyandCir57934.2023.10185432>
foaf:homepage <https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185432>
dc:identifier DBLP conf/vlsit/SuzukiHBUU23 (xsd:string)
dc:identifier DOI doi.org%2F10.23919%2FVLSITechnologyandCir57934.2023.10185432 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label A 40 nm 2 kb MTJ-Based Non-Volatile SRAM Macro with Novel Data-Aware Store Architecture for Normally Off Computing. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kazuhiro_Bessho>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Keizo_Hiraga>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kenta_Suzuki>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kimiyoshi_Usami>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Taku_Umebayashi>
swrc:pages 1-2 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsit/2023>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsit/SuzukiHBUU23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsit/SuzukiHBUU23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsit/vlsit2023.html#SuzukiHBUU23>
rdfs:seeAlso <https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185432>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsit>
dc:title A 40 nm 2 kb MTJ-Based Non-Volatile SRAM Macro with Novel Data-Aware Store Architecture for Normally Off Computing. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document