[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsit/VarzaghaniBLGYE22>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Aida_Varzaghani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alberto_Baldisserotto>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ankush_Goel>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bardia_Bozorgzadeh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Darshan_Kadia>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dimitri_Loizos>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jack_Lam>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jeffrey_Hwang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mehran_Izad>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mohamed_Elzeftawi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mohammad_Ranjbar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Paul_Lee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Seong-Ryong_Ryu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shahrzad_Naraghi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shwetabh_Verma>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sotirios_Zogopoulos>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Stefanos_Sidiropoulos>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Steven_Mikes>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sudipta_Sarkar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Varun_Joshi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xiaobin_Yuan>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVLSITechnologyandCir46769.2022.9830304>
foaf:homepage <https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830304>
dc:identifier DBLP conf/vlsit/VarzaghaniBLGYE22 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVLSITechnologyandCir46769.2022.9830304 (xsd:string)
dcterms:issued 2022 (xsd:gYear)
rdfs:label A 1-to-112Gb/s DSP-Based Wireline Transceiver with a Flexible Clocking Scheme in 5nm FinFET. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Aida_Varzaghani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alberto_Baldisserotto>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ankush_Goel>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bardia_Bozorgzadeh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Darshan_Kadia>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dimitri_Loizos>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jack_Lam>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jeffrey_Hwang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mehran_Izad>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mohamed_Elzeftawi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mohammad_Ranjbar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Paul_Lee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Seong-Ryong_Ryu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shahrzad_Naraghi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shwetabh_Verma>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sotirios_Zogopoulos>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Stefanos_Sidiropoulos>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Steven_Mikes>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sudipta_Sarkar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Varun_Joshi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xiaobin_Yuan>
swrc:pages 26-27 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsit/2022>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsit/VarzaghaniBLGYE22/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsit/VarzaghaniBLGYE22>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#VarzaghaniBLGYE22>
rdfs:seeAlso <https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830304>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsit>
dc:title A 1-to-112Gb/s DSP-Based Wireline Transceiver with a Flexible Clocking Scheme in 5nm FinFET. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document