[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vlsit/WangYXBLBJZTGSZ23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bing_Yu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fengguo_Zuo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fujun_Bai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jie_Tan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jun_Zhou>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Liang_Bai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Peng_Sun>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Qiong_Zhan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Qiwei_Ren>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sheng_Hu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Song_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wenwu_Xiao>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xiaodong_Long>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xiping_Jiang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xuerong_Jia>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yi_Kang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yixin_Guo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yu_Zhou>
foaf:homepage <http://dx.doi.org/doi.org%2F10.23919%2FVLSITechnologyandCir57934.2023.10185427>
foaf:homepage <https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185427>
dc:identifier DBLP conf/vlsit/WangYXBLBJZTGSZ23 (xsd:string)
dc:identifier DOI doi.org%2F10.23919%2FVLSITechnologyandCir57934.2023.10185427 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label A 135 GBps/Gbit 0.66 pJ/bit Stacked Embedded DRAM with Multilayer Arrays by Fine Pitch Hybrid Bonding and Mini-TSV. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bing_Yu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fengguo_Zuo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fujun_Bai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jie_Tan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jun_Zhou>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Liang_Bai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Peng_Sun>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Qiong_Zhan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Qiwei_Ren>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sheng_Hu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Song_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wenwu_Xiao>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xiaodong_Long>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xiping_Jiang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xuerong_Jia>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yi_Kang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yixin_Guo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yu_Zhou>
swrc:pages 1-2 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vlsit/2023>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vlsit/WangYXBLBJZTGSZ23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vlsit/WangYXBLBJZTGSZ23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vlsit/vlsit2023.html#WangYXBLBJZTGSZ23>
rdfs:seeAlso <https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185427>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vlsit>
dc:title A 135 GBps/Gbit 0.66 pJ/bit Stacked Embedded DRAM with Multilayer Arrays by Fine Pitch Hybrid Bonding and Mini-TSV. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document