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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vts/BhattacharyaD96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Subhrajit_Bhattacharya>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sujit_Dey>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVTEST.1996.510838>
foaf:homepage <https://doi.org/10.1109/VTEST.1996.510838>
dc:identifier DBLP conf/vts/BhattacharyaD96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVTEST.1996.510838 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label H-SCAN: A high level alternative to full-scan testing with reduced area and test application overheads. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Subhrajit_Bhattacharya>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sujit_Dey>
swrc:pages 74-80 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vts/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vts/BhattacharyaD96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vts/BhattacharyaD96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vts/vts1996.html#BhattacharyaD96>
rdfs:seeAlso <https://doi.org/10.1109/VTEST.1996.510838>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vts>
dc:subject integrated circuit testing; design for testability; automatic testing; boundary scan testing; H-SCAN; high-level design; testing methodology; parallel register connectivity; area overhead; comparator; on-chip response; sequential test vectors; combinational test vectors; combinational ATPG program; RT-level design; fault simulation; fault coverage; test application time; test pattern generation (xsd:string)
dc:title H-SCAN: A high level alternative to full-scan testing with reduced area and test application overheads. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document