Simulation of at-speed tests for stuck-at faults.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vts/ChakrabortyA95
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Simulation of at-speed tests for stuck-at faults.
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fault diagnosis; logic testing; timing; delays; circuit analysis computing; hazards and race conditions; integrated circuit testing; stuck-at fault detectability; at-speed test simulation; path delays; delayed signal transitions; timing hazards; high speed test; fault simulation method; delay-hazard robust test coverage; timing considerations; high performance circuits
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Simulation of at-speed tests for stuck-at faults.
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