An asynchronous totally self-checking two-rail code error indicator.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vts/GaitanisGPK96
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1996
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An asynchronous totally self-checking two-rail code error indicator.
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error detection; logic testing; delays; VLSI; automatic testing; integrated circuit testing; asynchronous circuits; CMOS logic circuits; asynchronous TSC error indicator; totally self-checking error indicator; concurrent detection; delay faults; two-rail code error indicator; CMOS implementation
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An asynchronous totally self-checking two-rail code error indicator.
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