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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vts/KumarCWAS23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bharath_Shankaranarayanan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bhrugurajsinh_Chudasama>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bin_B._W._Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Manish_Arora>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vinay_Kumar>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVTS56346.2023.10140091>
foaf:homepage <https://doi.org/10.1109/VTS56346.2023.10140091>
dc:identifier DBLP conf/vts/KumarCWAS23 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVTS56346.2023.10140091 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label Allocating Physically Aware Embedded Memory Test & Repair Processor using Floorplan Info at the RTL Design Level. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bharath_Shankaranarayanan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bhrugurajsinh_Chudasama>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bin_B._W._Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Manish_Arora>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vinay_Kumar>
swrc:pages 1-4 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vts/2023>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vts/KumarCWAS23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vts/KumarCWAS23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vts/vts2023.html#KumarCWAS23>
rdfs:seeAlso <https://doi.org/10.1109/VTS56346.2023.10140091>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vts>
dc:title Allocating Physically Aware Embedded Memory Test & Repair Processor using Floorplan Info at the RTL Design Level. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document