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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vts/NairH95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dong_Sam_Ha>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rajesh_Nair>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVTEST.1995.512641>
foaf:homepage <https://doi.org/10.1109/VTEST.1995.512641>
dc:identifier DBLP conf/vts/NairH95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVTEST.1995.512641 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label VISION: an efficient parallel pattern fault simulator for synchronous sequential circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dong_Sam_Ha>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rajesh_Nair>
swrc:pages 221-226 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vts/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vts/NairH95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vts/NairH95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vts/vts1995.html#NairH95>
rdfs:seeAlso <https://doi.org/10.1109/VTEST.1995.512641>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vts>
dc:subject fault diagnosis; logic testing; sequential circuits; VLSI; integrated circuit testing; circuit analysis computing; digital simulation; flip-flops; parallel pattern fault simulator; synchronous sequential circuits; VISION; heuristics; benchmark circuits; VLSI (xsd:string)
dc:title VISION: an efficient parallel pattern fault simulator for synchronous sequential circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document