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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vts/PetlinF95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/O._A._Petlin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Stephen_B._Furber>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVTEST.1995.512652>
foaf:homepage <https://doi.org/10.1109/VTEST.1995.512652>
dc:identifier DBLP conf/vts/PetlinF95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVTEST.1995.512652 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Scan testing of micropipelines. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/O._A._Petlin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Stephen_B._Furber>
swrc:pages 296-303 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vts/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vts/PetlinF95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vts/PetlinF95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vts/vts1995.html#PetlinF95>
rdfs:seeAlso <https://doi.org/10.1109/VTEST.1995.512652>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vts>
dc:subject asynchronous circuits; logic testing; computer testing; integrated circuit testing; VLSI; design for testability; delays; microprocessor chips; boundary scan testing; fault location; logic design; integrated circuit design; micropipelines; asynchronous VLSI circuit design; AMULET1 microprocessor; scan test technique; data processing blocks; test patterns; single stuck-at faults; delay faults; combinational processing logic; state holding elements; test generation techniques (xsd:string)
dc:title Scan testing of micropipelines. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document