[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vts/RajanLA96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/David_E._Long>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Krishna_B._Rajan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Miron_Abramovici>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVTEST.1996.510861>
foaf:homepage <https://doi.org/10.1109/VTEST.1996.510861>
dc:identifier DBLP conf/vts/RajanLA96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVTEST.1996.510861 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label Increasing testability by clock transformation (getting rid of those darn states). (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/David_E._Long>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Krishna_B._Rajan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Miron_Abramovici>
swrc:pages 224-230 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vts/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vts/RajanLA96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vts/RajanLA96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vts/vts1996.html#RajanLA96>
rdfs:seeAlso <https://doi.org/10.1109/VTEST.1996.510861>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vts>
dc:subject logic testing; sequential circuits; clocks; flip-flops; design for testability; logic partitioning; testability; clock transformation; sequential test generation; darn states; fault coverage; flip-flops; DFT; partitioning; easy-to-reach states (xsd:string)
dc:title Increasing testability by clock transformation (getting rid of those darn states). (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document