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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vts/RenovellFZ97>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Joan_Figueras>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Michel_Renovell>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yervant_Zorian>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVTEST.1997.600278>
foaf:homepage <https://doi.org/10.1109/VTEST.1997.600278>
dc:identifier DBLP conf/vts/RenovellFZ97 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVTEST.1997.600278 (xsd:string)
dcterms:issued 1997 (xsd:gYear)
rdfs:label Test of RAM-based FPGA: methodology and application to the interconnect. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Joan_Figueras>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Michel_Renovell>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yervant_Zorian>
swrc:pages 230-237 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vts/1997>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vts/RenovellFZ97/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vts/RenovellFZ97>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vts/vts1997.html#RenovellFZ97>
rdfs:seeAlso <https://doi.org/10.1109/VTEST.1997.600278>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vts>
dc:subject field programmable gate arrays; RAM-based FPGA; interconnect; manufacturing test procedure; user test procedure; orthogonal test configuration; diagonal-1 test configuration; diagonal-2 test configuration (xsd:string)
dc:title Test of RAM-based FPGA: methodology and application to the interconnect. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document