Detecting IDDQ defective CMOS circuits by depowering.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vts/RiusF95
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Detecting IDDQ defective CMOS circuits by depowering.
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integrated circuit testing; CMOS logic circuits; logic testing; fault location; I/sub DDQ/ defective CMOS circuits; depowering; fault detection capabilities; quiescent state; capacitance; logic valves; discharge current; power supply line disconnection
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Detecting IDDQ defective CMOS circuits by depowering.
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