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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vts/SanghaniYNL11>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Amit_Sanghani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bo_Yang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chunsheng_Liu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Karthikeyan_Natarajan>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVTS.2011.5783724>
foaf:homepage <https://doi.org/10.1109/VTS.2011.5783724>
dc:identifier DBLP conf/vts/SanghaniYNL11 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVTS.2011.5783724 (xsd:string)
dcterms:issued 2011 (xsd:gYear)
rdfs:label Design and implementation of a time-division multiplexing scan architecture using serializer and deserializer in GPU chips. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Amit_Sanghani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bo_Yang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chunsheng_Liu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Karthikeyan_Natarajan>
swrc:pages 219-224 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vts/2011>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vts/SanghaniYNL11/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vts/SanghaniYNL11>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vts/vts2011.html#SanghaniYNL11>
rdfs:seeAlso <https://doi.org/10.1109/VTS.2011.5783724>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vts>
dc:title Design and implementation of a time-division multiplexing scan architecture using serializer and deserializer in GPU chips. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document