Methods to reduce test application time for accumulator-based self-test.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/vts/StroeleM97
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Methods to reduce test application time for accumulator-based self-test.
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built-in self test; accumulator-based self-test; test application time reduction; test pattern generators; test length minimization; fault coverage; simulation-based reseeding method; random pattern testable circuits; forward simulation; reverse order simulation; hard fault detection; optimal input value; test length reductions; data path blocks; embedded processor; BIST scheme; circuit optimization; ATALANTA fault simulation; combinatorial circuit testing
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Methods to reduce test application time for accumulator-based self-test.
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