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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vts/UppaluriSP96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Irith_Pomeranz>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Prasanti_Uppaluri>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Uwe_Sparmann>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVTEST.1996.510870>
foaf:homepage <https://doi.org/10.1109/VTEST.1996.510870>
dc:identifier DBLP conf/vts/UppaluriSP96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVTEST.1996.510870 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label On minimizing the number of test points needed to achieve complete robust path delay fault testability. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Irith_Pomeranz>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Prasanti_Uppaluri>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Uwe_Sparmann>
swrc:pages 288-295 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vts/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vts/UppaluriSP96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vts/UppaluriSP96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vts/vts1996.html#UppaluriSP96>
rdfs:seeAlso <https://doi.org/10.1109/VTEST.1996.510870>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vts>
dc:subject combinational circuits; fault diagnosis; logic testing; delays; robust path delay fault testability; test point insertion; combinational circuit; test generation; RD fault identification (xsd:string)
dc:title On minimizing the number of test points needed to achieve complete robust path delay fault testability. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document