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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vts/VahidiO95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alex_Orailoglu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mahsa_Vahidi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVTEST.1995.512633>
foaf:homepage <https://doi.org/10.1109/VTEST.1995.512633>
dc:identifier DBLP conf/vts/VahidiO95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVTEST.1995.512633 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Testability metrics for synthesis of self-testable designs and effective test plans. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alex_Orailoglu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mahsa_Vahidi>
swrc:pages 170-175 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vts/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vts/VahidiO95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vts/VahidiO95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vts/vts1995.html#VahidiO95>
rdfs:seeAlso <https://doi.org/10.1109/VTEST.1995.512633>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vts>
dc:subject high level synthesis; logic CAD; design for testability; built-in self test; VLSI; integrated circuit design; testability metrics; self-testable designs; effective test plans; unified metrics; synthesis phases; benchmark designs; VLSI; BIST; DFT; high level synthesis (xsd:string)
dc:title Testability metrics for synthesis of self-testable designs and effective test plans. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document