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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vts/VazquezHR96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Adoraci%E2%88%9A%E2%89%A5n_Rueda>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Diego_V%E2%88%9A%C2%B0zquez>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_L._Huertas>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVTEST.1996.510833>
foaf:homepage <https://doi.org/10.1109/VTEST.1996.510833>
dc:identifier DBLP conf/vts/VazquezHR96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVTEST.1996.510833 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label Reducing the impact of DFT on the performance of analog integrated circuits: improved sw-op amp design. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Adoraci%E2%88%9A%E2%89%A5n_Rueda>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Diego_V%E2%88%9A%C2%B0zquez>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_L._Huertas>
swrc:pages 42-47 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vts/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vts/VazquezHR96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/vts/VazquezHR96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vts/vts1996.html#VazquezHR96>
rdfs:seeAlso <https://doi.org/10.1109/VTEST.1996.510833>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vts>
dc:subject design for testability; integrated circuit testing; analogue integrated circuits; operational amplifiers; CMOS analogue integrated circuits; integrated circuit design; DFT; analog integrated circuits; sw-op amp design; IC testing; CMOS implementations; power dissipation; area; design efforts; cell design (xsd:string)
dc:title Reducing the impact of DFT on the performance of analog integrated circuits: improved sw-op amp design. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document