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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/wotug/SaifhashemiB05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Arash_Saifhashemi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Peter_A._Beerel>
foaf:homepage <http://www.booksonline.iospress.nl/Content/View.aspx?piid=701>
dc:identifier DBLP conf/wotug/SaifhashemiB05 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label High Level Modeling of Channel-Based Asynchronous Circuits Using Verilog. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Arash_Saifhashemi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Peter_A._Beerel>
swrc:pages 275-288 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/wotug/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/wotug/SaifhashemiB05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/wotug/SaifhashemiB05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/wotug/cpa2005.html#SaifhashemiB05>
rdfs:seeAlso <http://www.booksonline.iospress.nl/Content/View.aspx?piid=701>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/wotug>
dc:title High Level Modeling of Channel-Based Asynchronous Circuits Using Verilog. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document