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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/access/ArandaRGM21>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Francisco_Garcia-Herrero>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Juan_Antonio_Maestro>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Luis_Alberto_Aranda>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Oscar_Ruano>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FACCESS.2021.3119633>
foaf:homepage <https://doi.org/10.1109/ACCESS.2021.3119633>
dc:identifier DBLP journals/access/ArandaRGM21 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FACCESS.2021.3119633 (xsd:string)
dcterms:issued 2021 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/access>
rdfs:label Reliability Analysis of ASIC Designs With Xilinx SRAM-Based FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Francisco_Garcia-Herrero>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Juan_Antonio_Maestro>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Luis_Alberto_Aranda>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Oscar_Ruano>
swrc:pages 140676-140685 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/access/ArandaRGM21/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/access/ArandaRGM21>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/access/access9.html#ArandaRGM21>
rdfs:seeAlso <https://doi.org/10.1109/ACCESS.2021.3119633>
dc:title Reliability Analysis of ASIC Designs With Xilinx SRAM-Based FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 9 (xsd:string)