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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/computer/RoyBB05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Debashis_Bhattacharya>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rob_Roy>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vamsi_Boppana>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FMC.2005.74>
foaf:homepage <https://doi.org/10.1109/MC.2005.74>
dc:identifier DBLP journals/computer/RoyBB05 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FMC.2005.74 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/computer>
rdfs:label Transistor-Level Optimization of Digital Designs with Flex Cells. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Debashis_Bhattacharya>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rob_Roy>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vamsi_Boppana>
swrc:number 2 (xsd:string)
swrc:pages 53-61 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/computer/RoyBB05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/computer/RoyBB05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/computer/computer38.html#RoyBB05>
rdfs:seeAlso <https://doi.org/10.1109/MC.2005.74>
dc:subject design and test, integrated circuit design, ASIC design methodology, power optimization, high-performance design (xsd:string)
dc:title Transistor-Level Optimization of Digital Designs with Flex Cells. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 38 (xsd:string)