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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/corr/0003GGD14>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Abhishek_Jain_0003>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hima_Gupta>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Piyush_Kumar_Gupta>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sachish_Dhar>
foaf:homepage <http://arxiv.org/abs/1401.3554>
dc:identifier DBLP journals/corr/0003GGD14 (xsd:string)
dcterms:issued 2014 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/corr>
rdfs:label Accelerating SystemVerilog UVM Based VIP to Improve Methodology for Verification of Image Signal Processing Designs Using HW Emulator. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Abhishek_Jain_0003>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hima_Gupta>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Piyush_Kumar_Gupta>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sachish_Dhar>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/corr/0003GGD14/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/corr/0003GGD14>
rdfs:seeAlso <http://arxiv.org/abs/1401.3554>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/corr/corr1401.html#0003GGD14>
dc:title Accelerating SystemVerilog UVM Based VIP to Improve Methodology for Verification of Image Signal Processing Designs Using HW Emulator. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume abs/1401.3554 (xsd:string)