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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/corr/AmmendolaBFCPLRSTV13>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alessandro_Lonardo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrea_Biagioni>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Davide_Rossetti>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Francesca_Lo_Cicero>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Francesco_Simula>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Laura_Tosoratto>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ottorino_Frezza>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pier_Stanislao_Paolucci>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Piero_Vicini>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Roberto_Ammendola>
foaf:homepage <http://arxiv.org/abs/1311.1741>
dc:identifier DBLP journals/corr/AmmendolaBFCPLRSTV13 (xsd:string)
dcterms:issued 2013 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/corr>
rdfs:label Architectural improvements and 28 nm FPGA implementation of the APEnet+ 3D Torus network for hybrid HPC systems. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alessandro_Lonardo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrea_Biagioni>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Davide_Rossetti>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Francesca_Lo_Cicero>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Francesco_Simula>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Laura_Tosoratto>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ottorino_Frezza>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pier_Stanislao_Paolucci>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Piero_Vicini>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Roberto_Ammendola>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/corr/AmmendolaBFCPLRSTV13/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/corr/AmmendolaBFCPLRSTV13>
rdfs:seeAlso <http://arxiv.org/abs/1311.1741>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/corr/corr1311.html#AmmendolaBFCPLRSTV13>
dc:title Architectural improvements and 28 nm FPGA implementation of the APEnet+ 3D Torus network for hybrid HPC systems. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume abs/1311.1741 (xsd:string)