A macro placer algorithm for chip design. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/journals/corr/CsokaD15>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Attila_De%E2%88%9A%C2%B0k>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Endre_Cs%E2%88%9A%E2%89%A5ka>
foaf:homepage	<http://arxiv.org/abs/1509.01867>
dc:identifier	DBLP journals/corr/CsokaD15 (xsd:string)
dcterms:issued	2015 (xsd:gYear)
swrc:journal	<https://dblp.l3s.de/d2r/resource/journals/corr>
rdfs:label	A macro placer algorithm for chip design. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Attila_De%E2%88%9A%C2%B0k>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Endre_Cs%E2%88%9A%E2%89%A5ka>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/journals/corr/CsokaD15/dblp>
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rdfs:seeAlso	<http://arxiv.org/abs/1509.01867>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/journals/corr/corr1509.html#CsokaD15>
dc:title	A macro placer algorithm for chip design. (xsd:string)
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rdf:type	swrc:Article
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swrc:volume	abs/1509.01867 (xsd:string)