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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/corr/PaulCG14b>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Amlan_Chakrabarti>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ranjan_Ghosh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rourab_Paul>
foaf:homepage <http://arxiv.org/abs/1410.7560>
dc:identifier DBLP journals/corr/PaulCG14b (xsd:string)
dcterms:issued 2014 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/corr>
rdfs:label Multi Core SSL/TLS Security Processor Architecture Prototype Design with automated Preferential Algorithm in FPGA. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Amlan_Chakrabarti>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ranjan_Ghosh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rourab_Paul>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/corr/PaulCG14b/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/corr/PaulCG14b>
rdfs:seeAlso <http://arxiv.org/abs/1410.7560>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/corr/corr1410.html#PaulCG14b>
dc:title Multi Core SSL/TLS Security Processor Architecture Prototype Design with automated Preferential Algorithm in FPGA. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume abs/1410.7560 (xsd:string)