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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/corr/abs-1910-05100>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Arish_S>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/R._K._Sharma>
foaf:homepage <http://arxiv.org/abs/1910.05100>
dc:identifier DBLP journals/corr/abs-1910-05100 (xsd:string)
dcterms:issued 2019 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/corr>
rdfs:label Run-Time-Reconfigurable Multi-Precision Floating-Point Matrix Multiplier Intellectual Property Core on FPGA. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Arish_S>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/R._K._Sharma>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/corr/abs-1910-05100/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/corr/abs-1910-05100>
rdfs:seeAlso <http://arxiv.org/abs/1910.05100>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/corr/corr1910.html#abs-1910-05100>
dc:title Run-Time-Reconfigurable Multi-Precision Floating-Point Matrix Multiplier Intellectual Property Core on FPGA. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume abs/1910.05100 (xsd:string)