Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/dafes/DhanwadaBDNGDL05
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Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems.
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Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems.
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