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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/dt/BustanKSY12>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dmitry_Korchemny>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Doron_Bustan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Erik_Seligman>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jin_Yang_0006>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FMDT.2012.2183336>
foaf:homepage <https://doi.org/10.1109/MDT.2012.2183336>
dc:identifier DBLP journals/dt/BustanKSY12 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FMDT.2012.2183336 (xsd:string)
dcterms:issued 2012 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/dt>
rdfs:label SystemVerilog Assertions: Past, Present, and Future SVA Standardization Experience. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dmitry_Korchemny>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Doron_Bustan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Erik_Seligman>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jin_Yang_0006>
swrc:number 2 (xsd:string)
swrc:pages 23-31 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/dt/BustanKSY12/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/dt/BustanKSY12>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/dt/dt29.html#BustanKSY12>
rdfs:seeAlso <https://doi.org/10.1109/MDT.2012.2183336>
dc:title SystemVerilog Assertions: Past, Present, and Future SVA Standardization Experience. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 29 (xsd:string)